[elektro] STM32F4 discovery I2S modul config

[Pal Lukacs]

Sziasztok !

Az eredeti temahoz visszaterve van fejlemeny, de nincs megoldas tovabbra sincs.

Most 48kHz mintavetelt es 24 bites modot beallitva az i2s modulon a master clk 4MHz lett a bit clk pedig 1 MHz.
Az mclk 256*48kHz=12, 288000 MHz kellene legyen, a bit clk 32bit*2csatorna*48kHz=3, 072000 MHz kellene legyen.
Vegigneztem az egesz pll konfigot. A HSE is a panelon levo oszcillator frekvenciajara van allitva, vagyis 8MHz.
A pll i2s modul frekvenciaja 86MHz (abeallitasok alapjan), ebbol szamolja az i2s init a tovabbi osztokat a megadott parameterek alapjan.


Megegyszer az ide tartozo kod:

 SPI_I2S_DeInit (SPI2);    // ERRATA: deinitialize i2s2 aka. spi2
/* For this standard, the WS signal is used to indicate which channel is being transmitted. It is
activated one CK clock cycle before the first bit (MSB) is available.
*/
  I2S2_InitStructure.I2S_Standard = I2S_Standard_Phillips;    // Figure 263. I2S Phillips standard (16-bit extended to 32-bit packet frame with CPOL = 0)

//--> http://stm32.kosyak.info/doc/stm32f10x__spi_8h_source.html#l00099

  I2S2_InitStructure.I2S_DataFormat = I2S_DataFormat_24b;    //
 // Figure 260. I2S Phillips standard waveforms (24-bit frame with CPOL = 0)
  I2S2_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;
  I2S2_InitStructure.I2S_AudioFreq = I2S_AudioFreq_48k;    // 48k
  I2S2_InitStructure.I2S_CPOL = I2S_CPOL_Low;    //
  I2S2_InitStructure.I2S_Mode = I2S_Mode_MasterRx;    //
  I2S_Init (SPI2, &I2S2_InitStructure);


/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ 
#define PLL_M      8 
#define PLL_N      336 
 
/* SYSCLK = PLL_VCO / PLL_P */ 
#define PLL_P      2 
 
/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */ 
#define PLL_Q      7 
 
/* PLLI2S_VCO = (HSE_VALUE Or HSI_VALUE / PLL_M) * PLLI2S_N 
   I2SCLK = PLLI2S_VCO / PLLI2S_R */ 
#define PLLI2S_N   258 
#define PLLI2S_R   3 



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