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Hali!

> The Intel(R) XScale(TM) microarchitecture Technical Summary
> 
> The Intel® XScale™ microarchitecture Technical Summary
> 
> The Intel® XScale™ microarchitecture is based on a new core which is compliant with ARM* version 5TE. The microarchitecture surrounds the core with instruction and data memory manage-ment units; instruction, data, and mini-data caches; write, fill, pend, and branch target buffers; power management, performance monitoring, debug, and JTAG units; coprocessor interface; 32K caches; MMUs; BTB; MAC coprocessor; and core memory bus
> 
> http://www.intel.com/design/intelxscale/xscaledatasheet4.htm

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